AMD Software Engineer interview: RTL verification and debugging fundamentals

My interviews were hardware-centric from the start, with a strong focus on verification and digital-design fundamentals. I had a digital and RTL round covering Verilog/SystemVerilog, UVM, and the practical work of verification. A second round brought together projects and real scenarios.

The first technical section asked for solid fundamentals rather than broad buzzwords. The project round asked how I would reason through real-time-style issues related to the described work, while keeping the verification and debugging flavor.

I did not move forward, but the experience felt constructive. I understood that they wanted comfort with the concepts and with how they are applied during verification work.

Location: San Jose, CA. Overall feedback: neutral. Offer status: no offer.